1. Field of the Invention
The present invention generally relates to a voltage controlled oscillator and a phase locked loop circuit having the same, and more specifically, to a technology of reducing power consumption by using charges leaked into a ground voltage terminal for an output driving operation with characteristics of both output terminals having different phases in a unit delay cell.
2. Description of the Prior Art
Generally, a voltage controlled oscillator is a circuit to obtain a desired output frequency by regulating a voltage.
FIG. 1 is a circuit diagram illustrating a unit delay cell of a conventional voltage controlled oscillator.
The unit delay cell of the conventional voltage controlled oscillator comprises PMOS transistors PM1 and PM2, and NMOS transistors NM1˜NM3.
The NMOS transistors NM1 and NM2 are controlled by differential input voltages VIN, and VINB, respectively. When the input voltage VIN is larger than the input voltage VINB, the NMOS transistor NM1 is turned on stronger than the NMOS NM2.
In the above-described unit delay cell having a differential structure, since output voltages VOUT and VOUTB of both output terminals are outputted only depending on a power voltage VDD, power consumption becomes larger, and the output voltages VOUT and VOUTB become unstable when the level of the power voltage VDD becomes lower.
As a result, in the voltage controlled oscillator with the above-described unit delay cell, the power consumption becomes larger, so that noise is easily generated due to power shortage.